FAQ
You'll find here all the questions you can have about display driving, pattern generating etc..
Can I Test a HDMI panel with FPDLite ?
What is the difference between HDMI and DVI ?
How EDID detailed timings are used to drive a display ?
What is the difference between Front porch and Sync offset parameter ?
What is the relation between the pixel clock and the refresh rate ?
What is the maximum resolution of FPDLite ?
Can I test a HDMI panel with FPDLite ?
Yes, you only need to use a HDMI/DVI cable Male/male.
What is the difference between HDMI and DVI ?
The main difference between HDMI and DVI is that HDMI transfers video and audio signal. From video point of view, the main difference is the connector. Both DVI and HDMI are using TMDS (Transition Minimized Differential Signaling) link to transfer video signals.
What is TMDS (Transition Minimized Differential Signaling) ?
Logic signal such as TTL (single ended signals) are very susceptible to noise and then cannot be transmitted over great distances.
TMDS differential nature increases its immunity to common mode noise and this technology incorporates an advanced coding algorythm in order to increase its immunity to the noise.
The E-EDID (Extended Display Identification Data) standard was developed by VESA in order to define a data structure used to carry configuration information for optimal use of a display. This information is stored in the display and can be access via a DDC interface.
The DDC (Display Data Channel) standard was developed by VESA in order to define a protocol to communicate between host and display. The latest version of specification is Display Data Channel Command Interface (DDC/CI). The DDC/CI version is based on I2C Bus (5V). This protocol is bi-directionnal and then allow host to retrieve information (E-EDID data) and to display parameters.
How EDID detailed timings are used to drive a display ? What is the difference between "front porch" and "Sync offset" parameters ?
In fact front porch = Sync offset.
Below you can see how pixel line is driven:
What is the relation between the pixel clock and the refresh rate ?
First we have to calculate the number of pixel clocks for display a frame:
Pixel number = (horizontal active + horizontal blanking)*(vertical active + vertical blanking)
then:
Pixel clock = refresh rate * (horizontal active + horizontal blanking) * (vertical active + vertical blanking)
example:
Horizontal active = 1280 pixels
horizontal blanking = 408 pixels
vertical active = 1024 lines
vertical blanking = 42 lines
refresh rate = 75 Hz
Pixel clock = (1280 + 408) * (1024 + 42) * 75 = 135 MHz
What is the maximum resolution of FPDLite ?
The maximum resolution depends on 2 parameters:
- The maximum pixel clock: 165 MHz for DVI and HDMI standard
- The wanted refresh rate
Thus FPDLite can drive a display with a WQXGA (2560 x 1600) resolution. The maximal refresh rate will be: 28Hz.